STUDY AND DESIGN OF AUTOMATED TOOLS FOR SIMULATION OF SOFT ERRORS IN MODERN COMBINATIONAL CMOS IC
Abstract
Circuits are becoming more sensitive to the effects of heavy charged particles due to changes in design technologies: shrinking of features size, supply voltages, an increase denser chips and clock frequencies. The widespread use of modern CMOS integrated circuits in the cosmic, military industry, scientific research facilities, and medical therapy installations under conditions of radiation exposure, where failures are unacceptable, is relevant. But it should also be borne in mind that soft errors are possible in electronic systems at sea level as a result of exposure to neutrons and alpha particles, which makes the use radiation hardening measures of terrestrial applications also necessary. Today, methods being developed to ensure failure tolerance at the circuit-level. To evaluate methods for design radiation hardened integrated circuits, fast and accurate methods of automated simulation of soft errors are needed. But there are no automated tools for simulating of high-energy particles in commercial CAD systems. For 45nm technologies and below the majority of observed soft errors will occur in combinational logic. In this paper, the method of automated simulation of single event transients is proposed. The developed method is comparing with existing analogs. The paper shows the application of the method on a large set of combinational cells.
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